Field of the Invention
This invention is related to the field of processor implementation, and more particularly to techniques for implementing register renaming.
Description of the Related Art
Processors typically include a set of programmer-visible registers that provide temporary storage for the operands that are read by instructions as well as the results that are produced by instruction execution. The number and size of the programmer-visible registers is often defined as part of the instruction set architecture (ISA) implemented by the processor. As such, the programmer-visible registers are often referred to as “architected registers.” Thus, for example, a particular ISA might define 16 distinct 32-bit registers as being available for use by software.
In order to improve processor performance, many processors map architected registers to a larger set of physical registers using a technique commonly referred to as “register renaming.” For example, suppose that an instruction I1 reads the value of an architected register A1, and that an instruction I2 (which follows I1 in program order) writes to the same register A1. Even if I1 and I2 are otherwise independent instructions, I2 cannot correctly execute before I1, because I1 depends on the value of A1 before this register is written by I2. This situation may be referred to as a “write-after-read (WAR) dependency” or “false dependency.”
In this example, register renaming may map the instances of A1 referenced by I1 and I2 to two distinct physical registers P1 and P2. Following renaming, I1 may read from physical register P1, whereas I2 writes to physical register P2. Because I2 no longer references storage that I1 depends on, I2 may be permitted to execute concurrently with or prior to I1. Consequently, register naming may improve overall execution performance by increasing the amount of available parallelism in executing code. However, register renaming can be complex to implement in instances where an ISA defines multiple aliases for the same storage location.